1. Field of the Invention
The present invention relates to a semiconductor memory device in which different types of memory matrices are formed in the same cell matrix region.
2. Description of the Related Art
In recent years, various semiconductor memory devices have been developed and the number of the types of semiconductor memory devices has been increased. As various and advanced techniques have been developed, it has been frequently required that different types of semiconductor memories are mounted on the same semiconductor substrate. Conventionally, when at least two types of memory matrices which have different structures or different operations are to be formed on the same semiconductor substrate, the memory matrices are respectively formed at independent positions on the semiconductor substrate. Each of the memory matrices is a memory circuit constituted such that memory cells are aligned to have a certain regularity in X and Y directions and the memory cells are connected to row and column lines. Each of the memory cells is a memory unit constituted by at least source/drain diffusion layers formed on the semiconductor substrate surface to have a predetermined interval, and a conductive electrode serving as a gate electrode formed on the semiconductor substrate surface between the diffusion layers through a gate insulating film. As described above, even when the conventional different types of memory matrices are formed on the same chip, the memory matrices are formed as independent memory circuits in different layouts. Therefore, in the conventional technique, although it is considered that the independent circuits are mounted at the positions for arranging the memory matrices, the independent circuits are not considered as an integrated circuit. For this reason, there are waste spaces between the memory matrices and there is an overlapped and redundant circuit, thereby preventing the memory matrices from being highly integrated.